Hey guys.

Altera offers a service to copy your design form an Altera FPGA to an ASIC

"""
Altera offers a design flow based on HardCopy ASICs, which transitions the FPGA design, once finalized, to a form which is not alterable. This design flow reduces design security risks as well as costs for higher volume production. Design engineers can prototype their designs in Stratix series FPGAs, and then migrate these designs to HardCopy ASICs when they're ready for volume production.

The unique design flow makes hardware/software co-design and co-verification possible. The flow has been benchmarked to deliver systems to market 9 to 12 months faster, on average, than with standard-cell solutions. Design engineers can employ a single RTL, set of intellectual property (IP) cores, and Quartus II design software for both FPGA and ASIC implementations. Altera's HardCopy Design Center manages test insertion
""" Quoted from https://en.wikipedia.org/wiki/Altera#ASICs

It even allows to build the ASICs with 28nm fabrication process !!

http://www.altera.com/devices/asic/hardcopy-asics/about/hrd-index.html

I guess this option is much more feasible and easy to achieve than the traditional ASIC development process...

Why guys you don't start with this option?

Hi Clopez,

We have previous experience of FPGA-to-HardCopy conversions for commercial projects, so an Altera Hard Copy has been one of the options from the start.

On the other hand, HardCopy ASICs have higher unit prices and TPD, and one of the main goals is to provide the ASICs as cheap as possible.

--
Olof Kindgren
______________________________________________
ORSoC
Website: www.orsoc.se
Email: olof.kindgren@orsoc.se
______________________________________________
FPGA, ASIC, DSP - embedded SoC design

wow, that sound great...are we will be charge for the fabrication of the ASIC?

Whom are you working with ? :-)